Blogs about: Cool Circuits
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Dual Edge Binary Counters + Puzzle
I lately came across the need to use a dual edge counter, by this I mean a counter which is counting both on the rising and on the falling edge of the clock. The limitation is that one has to use only… more →
Adventures in ASIC Digital Design
Dual Edge Binary Counters + Puzzle
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Nir Dahan wrote 5 months ago: I lately came across the need to use a dual edge counter, by this I mean a counter which is counting … more →
Another Look at the Dual Edge Flip Flop
Nir Dahan wrote 1 year ago: After writing the solution to one of the puzzles and after contemplating about our dear friend the d … more →
Polymorphic Circuits
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Nir Dahan wrote 1 year ago: Here is a neat and not so new idea that I came across last year – “Polymorphic Circuits … more →
Edge Triggered SR Latch
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Nir Dahan wrote 1 year ago: I never really used an edge triggered SR latch in any of my circuits before, but I dug this from my … more →
Replace Your Ripple Counters
Nir Dahan wrote 1 year ago: I was recently talking to some friends, and they mentioned some problems they encountered after tape … more →
Cyclic Combinational Circuits
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Nir Dahan wrote 1 year ago: As one of my strange hobbies, I sometimes try to search the web for interesting PHD thesis works. I … more →
Johnson Counter Recovery Circuits
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Nir Dahan wrote 1 year ago: In a previous post I discussed the Johnson counter (diagram below). It was mentioned that if a bit a … more →
De Bruijn and Maximum Length LFSR Sequences
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Nir Dahan wrote 1 year ago: In the previous post I mentioned that a maximum length LFSR can be modified quite easily to generate … more →
Null Convention Logic
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Nir Dahan wrote 2 years ago: It is extremely rare in our industry that totally new approaches for Logic circuit design are taken. … more →
Pre-scaled Counters
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Nir Dahan wrote 2 years ago: It is obvious that as a normal binary counter increases in width its maximum operation frequency dro … more →
The Johnson Counter
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Nir Dahan wrote 2 years ago: Johnson counters, or Möbius counters (sometimes referred to with that name because of the abstract s … more →
Driving A Clock Frequency Signal From A Register
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Nir Dahan wrote 2 years ago: Usually in semi-custom flows it is a big no-no to use the clock in the data path. Sometimes it is ne … more →
The Double Edge Flip Flop
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Nir Dahan wrote 2 years ago: Sometimes it is necessary to use both the rising and the falling edge of the clock to sample the dat … more →
Low Power - Clock Gating Is Not The End Of It...
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Nir Dahan wrote 2 years ago: A good friend of mine, who works for one of the micro-electronics giants, told me how low power is t … more →
Clock Muxing
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Nir Dahan wrote 2 years ago: Glitch free clock muxing is tricky. Some designers take it on the safe side and disable both clocks, … more →
