Paolo Nenzi, Dietmar, Holger Vogt and Robert Larice have contributed to the enhanced stability with the new ngspice rework 20 release. ngspice rework 20 has already been pushed to fedora stable reposi… more →
EDA tools on Fedora while diving with the electronsDan Nenni wrote 1 day ago: This Blog is a follow-up to my ever popular declaration that EDA is DEAD. I know comparing Google to … more →
Chitlesh wrote 2 days ago: Paolo Nenzi, Dietmar, Holger Vogt and Robert Larice have contributed to the enhanced stability with … more →
angelovgallery wrote 2 days ago: de la Dani Ieri, sambata, i-am facut o vizita la domiciliu Danielei (Edani) – sa mai povestim … more →
Pradeep Chakraborty wrote 3 days ago: Wesley Ryder, Worldwide Technical Director, Mentor Graphics. Early April, I had met Wesley Ryder, Wo … more →
Ravi Teja G wrote 3 days ago: Fedora Electronic Lab is great. I installed it today. It was working out of the box. It has every pa … more →
Chitlesh wrote 4 days ago: Cary R. published some statistics about the amount of time spent in bug fixing for the most widely u … more →
jfaleiro wrote 5 days ago: I was looking into Protocol Buffers as an alternative to represent events in RMS architectures and t … more →
clerksmpc wrote 1 week ago: Final mins Oct 09. This includes: Updates on EDA Village Website update TV Signal interference Remov … more →
dojones1 wrote 1 week ago: For all the latest news, and to have your say, about the opposition to the EDA development proposal … more →
bradpierce wrote 1 week ago: According to John Sanguinetti In a technical field like EDA, understanding the problem, and understa … more →
Kitov wrote 1 week ago: Petals ESB v3.0 is finally out (two years after the v2.0 release), there are many changes in this ve … more →
dojones1 wrote 2 weeks ago: Members of a close-knit community have expressed fears about the repercussions of building 12,000 ho … more →
Ravi Teja G wrote 2 weeks ago: Quartus II is available for linux users. EDA@Linux enthusiasts who are looking for a verilog or vhdl … more →
Dan Nenni wrote 2 weeks ago: To follow up one of my most popular blogs TSMC 40nm Yield Explained!, here is a closer look at the 4 … more →
Pradeep Chakraborty wrote 2 weeks ago: Lip-Bu Tan, president and CEO, Cadence Design Systems @ CDNLive in Bangalore, India. I recently atte … more →
Ravi Teja G wrote 2 weeks ago: Icarus Verilog is a verilog compiler used to simulate verilog code. This post is a getting started t … more →
jvaconsulting wrote 2 weeks ago: On November 19, JVA Consulting and friends celebrated the graduation of the Fall 2009 Executive Dire … more →
Chitlesh wrote 3 weeks ago: Tim Edwards has tagged version 3.6 to stable, and version 3.7 is the new development version. The st … more →
Chitlesh wrote 3 weeks ago: Karen Bartleson reports some interesting facts from the 22nd EDA Interoperability forum in her blog. … more →