Open Drain Lines Open Drain Lines (tags: Open Drain Lines Signal integrity howard johnson sigcon transmission)… more →
Applied Electronics Journaljanatanews wrote 2 weeks ago: PCB Designers can use this Mils to MM Calculator That they often need … more →
abhinavi2 wrote 1 month ago: Learn, Share & Advice with eZdia and turn it into hard cash http://ezdia.com/profile/adam http:/ … more →
Kim Sterling wrote 1 month ago: IPC just released a new design document: IPC-2152, Standard for Determining Current-Carrying Capacit … more →
IPC wrote 1 month ago: Answered by IPC Technical Projects Manager, John Perry Originally posted 9/21/09 … more →
Yu-Hsiu Liu wrote 2 months ago: Lots of resources and papers to read about SI issues when designing PCBs. http://www.rfcafe.com/ htt … more →
itnds wrote 10 months ago: This section provides a basic understanding of the semiconductor production process. Coverage is spe … more →
Betta Wahyu R.M wrote 10 months ago: Size: 29.23MB Publisher: Visit Website Release Date: 2007-03-06 OS: Win NT/2K/XP/2K3 Description: Di … more →
theprossman wrote 1 year ago: DesignAdvance Systems, Inc., a leading developer of intelligent EDA solutions for PCB design, announ … more →
deshapriya wrote 1 year ago: E6 20% tolerance E12 10% tolerance E24 5% tolerance E48 2% tolerance E96 1% tolerance E192 0.5, 0.25 … more →
ollie wrote 1 year ago: I am studying electronics and we are working with the PCB. After the actual designing and removing t … more →
AG Raja wrote 2 years ago: Open Drain Lines Open Drain Lines (tags: Open Drain Lines Signal integrity howard johnson sigcon tra … more →
AG Raja wrote 2 years ago: ebd file simulation using Allegro ebd file simulation using Allegro (tags: ebd file simulation using … more →
AG Raja wrote 2 years ago: IBIS Ver. 1.1 Buffer Modeling Cookbook IBIS Ver. 1.1 Buffer Modeling Cookbook (tags: IBIS Buffer Mod … more →
AG Raja wrote 2 years ago: SketchUp Components Collection SketchUp Components Collection (tags: SketchUp Components Collection … more →
AG Raja wrote 2 years ago: No Translation required for the following: [TTL] to [TTL] [TTL] to [CMOS with input switching at TTL … more →
AG Raja wrote 2 years ago: Each interconnect is a transmission line Forget the word ground; Think return path. Bandwidth of a s … more →
AG Raja wrote 2 years ago: USB is a polled cable bus with single-host-scheduled, token-based protocol. Tiered-star topology: US … more →
AG Raja wrote 2 years ago: Universal Asynchronous Receiver Transmitter: Used for serial communications via cable. UART generat … more →
AG Raja wrote 2 years ago: JTAG: Joint Test Action Group Boundary Scan technology has the ability to set and read values on pin … more →